Processor(Building a Datapath) by Muhammad Yusuf Bin Ahmad Shah Ruddeen

Major Component

First element needed is a place to store the program instructions. Memory is used to hold and supply instructions given an address.The address must be kept in the Program Counter (PC), and in order to increment the PC to the address of the next instruction, we also need an Adder.All these elements are shown in figure2.1.After fetching one instruction from the instruction memory, the program counter has to be incremented so that it points to the address of the next instruction 4bytes later.

Instruction Memory , Program Counter

Component For Arithmatic & Logic Function 

we use all instruction read two registers, perform an ALU operation and write back the result.Arithmetic logical instructions are  called R-type instructions. This instruction class considers add, sub, slt, and  and or . The 32 registers are stored in Register File. To read a data word two inputs and outputs are needed. The inputs are 5 bits wide and specify the register number to be read, the outputs are 32 bits wide and carry value of the register.To write the result back two inputs are needed: one to specify the register num-ber and one to supply the data to be written.

Registered ALU And Datapath R-type Instruction

Load Word(lw) And Store Word(sw)

Two elements are needed to implement the sw- and lw-instructions: 

i.Data Memory 

ii.Sign Extension Unit

sw and lw instruction compute a memory address by adding a register value for 16bit signed offset field.The instruction offset field must signed extended from 16 to 32 bits simply by concatenating the sign bit 16 times to the original value

Branch on equal instruction

Instruction has 3 operands, 2 registers that are compared for equality, and a 16-bit offset are used to compute the branch target address relativeto the branch instruction address.

This datapath must do 2 operations:

i.compare the register contents

ii.and compute the branch target

2 things must be done:

i.The address field of the branch instruction must be sign extended from 16 bits to 32 bits.

ii.must be shifted left 2 bits so that it is a word offset.

Jump Instruction

Jump instruction is similar to the branch instruction, but computes the target PC differently.The destination address for a jump is formed by concatenating the upper 4 bitsof the current PC + 4 to the 26-bit address field in the jump instruction 

**Picture and some info are taken from http://cs.nyu.edu/courses/fall01/V22.0436-001/lectures/lecture-14.html.

By muhammad Yusuf Bin Ahmad Shah Ruddeen